Commit d33e0122 authored by James Pallister's avatar James Pallister
Browse files

Still large problems

parent b65ea6c5

src/firmware/energy_monitor.c

+160 −146
Original line number Diff line number Diff line
@@ -120,6 +120,21 @@ unsigned n_samples=0; 


int tperiod=TPERIOD_INIT;



// Data structs



#define NUM_BUFFERS         64

#define DMA_SHORTS          128



typedef struct {

    unsigned short data[DMA_SHORTS];

    unsigned short idx;

} power_data;



power_data data_bufs[NUM_BUFFERS] = {0};



int sent_counter=0;







void exti_setup()

{
@@ -177,12 +192,13 @@ void start_measurement() 
    a_data.peak_current = 0;

    a_data.n_samples = 0;



    tperiod = 500;

    tperiod = 5000;



    adc_power_on(ADC1);



    timer_set_period(TIM2, tperiod);

    timer_enable_counter(TIM2);



    adc_power_on(ADC1);

    // adc_power_on(ADC2);

    // adc_power_on(ADC3);

    gpio_set(GPIOD, GPIO12);
@@ -191,12 +207,10 @@ void start_measurement() 
void stop_measurement()

{

    running = 0;

    head_ptr = 0;

    tail_ptr = 0;

    // head_ptr = 0;

    // tail_ptr = 0;

    timer_disable_counter(TIM2);

    adc_off(ADC1);

    // adc_off(ADC2);

    // adc_off(ADC3);

    // adc_off(ADC1);

    gpio_clear(GPIOD, GPIO12);

}
@@ -342,65 +356,38 @@ static void usbdev_set_config(usbd_device *usbd_dev, uint16_t wValue) 
    usbd_register_reset_callback(usbd_dev, usb_reset_cb);

}



// Data structs



#define DATA_BUF_BYTES      64

#define DATA_BUF_SHORTS     42

#define NUM_BUFFERS         1000

#define NUM_BUFFERS_MASK    (NUM_BUFFERS-1)



#define HIGH_THRESH         64

#define LOW_THRESH          960



#define REGULAR_ADC_SHORTS  45

#define DUAL_ADC_SHORTS     (42*2)



#define DMA_SHORTS          128



typedef struct {

    unsigned char data[DATA_BUF_BYTES];

} power_data;



power_data data_bufs[NUM_BUFFERS] = {0};



unsigned short dbuf0[DMA_SHORTS] __attribute__ ((aligned (8)));

unsigned short dbuf1[DMA_SHORTS] __attribute__ ((aligned (8)));

int sent_counter=0;







void dma_setup()

{

    dma_stream_reset(DMA2, DMA_STREAM0);



    dma_set_peripheral_address(DMA2, DMA_STREAM0, (uint32_t)&ADC1_DR);

    dma_set_number_of_data(DMA2, DMA_STREAM0, DMA_SHORTS);



    dma_set_memory_address(DMA2, DMA_STREAM0, (uint32_t)&dbuf0);

    dma_set_memory_address_1(DMA2, DMA_STREAM0, (uint32_t)&dbuf1);

    dma_set_initial_target(DMA2, DMA_STREAM0, 0);

    dma_enable_double_buffer_mode(DMA2, DMA_STREAM0);



    dma_set_transfer_mode(DMA2, DMA_STREAM0, DMA_SxCR_DIR_PERIPHERAL_TO_MEM);

    dma_enable_memory_increment_mode(DMA2, DMA_STREAM0);

    dma_set_peripheral_size(DMA2, DMA_STREAM0, DMA_SxCR_PSIZE_16BIT);

    dma_set_memory_size(DMA2, DMA_STREAM0, DMA_SxCR_MSIZE_16BIT);

    dma_set_priority(DMA2, DMA_STREAM0, DMA_SxCR_PL_HIGH);

    dma_enable_circular_mode(DMA2, DMA_STREAM0);

    dma_channel_select(DMA2, DMA_STREAM0, DMA_SxCR_CHSEL_0);

    dma_set_peripheral_burst(DMA2, DMA_STREAM0, DMA_SxCR_PBURST_SINGLE);

    dma_set_memory_burst(DMA2, DMA_STREAM0, DMA_SxCR_MBURST_INCR4);

    dma_enable_fifo_mode(DMA2, DMA_STREAM0);

    dma_set_fifo_threshold(DMA2, DMA_STREAM0, DMA_SxFCR_FTH_4_4_FULL);



    dma_enable_transfer_complete_interrupt(DMA2, DMA_STREAM0);

    dma_enable_fifo_error_interrupt(DMA2, DMA_STREAM0);

    dma_enable_transfer_error_interrupt(DMA2, DMA_STREAM0);



    nvic_set_priority(NVIC_DMA2_STREAM0_IRQ, 1);

    nvic_enable_irq(NVIC_DMA2_STREAM0_IRQ);

    // dma_enable_stream(DMA2, DMA_STREAM0);

}

// void dma_setup()

// {

//     dma_stream_reset(DMA2, DMA_STREAM0);



//     dma_set_peripheral_address(DMA2, DMA_STREAM0, (uint32_t)&ADC1_DR);

//     dma_set_number_of_data(DMA2, DMA_STREAM0, DMA_SHORTS);



//     dma_set_memory_address(DMA2, DMA_STREAM0, (uint32_t)&dbuf0);

//     dma_set_memory_address_1(DMA2, DMA_STREAM0, (uint32_t)&dbuf1);

//     dma_set_initial_target(DMA2, DMA_STREAM0, 0);

//     dma_enable_double_buffer_mode(DMA2, DMA_STREAM0);



//     dma_set_transfer_mode(DMA2, DMA_STREAM0, DMA_SxCR_DIR_PERIPHERAL_TO_MEM);

//     dma_enable_memory_increment_mode(DMA2, DMA_STREAM0);

//     dma_set_peripheral_size(DMA2, DMA_STREAM0, DMA_SxCR_PSIZE_16BIT);

//     dma_set_memory_size(DMA2, DMA_STREAM0, DMA_SxCR_MSIZE_16BIT);

//     dma_set_priority(DMA2, DMA_STREAM0, DMA_SxCR_PL_HIGH);

//     dma_enable_circular_mode(DMA2, DMA_STREAM0);

//     dma_channel_select(DMA2, DMA_STREAM0, DMA_SxCR_CHSEL_0);

//     dma_set_peripheral_burst(DMA2, DMA_STREAM0, DMA_SxCR_PBURST_SINGLE);

//     dma_set_memory_burst(DMA2, DMA_STREAM0, DMA_SxCR_MBURST_INCR4);

//     dma_enable_fifo_mode(DMA2, DMA_STREAM0);

//     dma_set_fifo_threshold(DMA2, DMA_STREAM0, DMA_SxFCR_FTH_4_4_FULL);



//     dma_enable_transfer_complete_interrupt(DMA2, DMA_STREAM0);

//     dma_enable_fifo_error_interrupt(DMA2, DMA_STREAM0);

//     dma_enable_transfer_error_interrupt(DMA2, DMA_STREAM0);



//     nvic_set_priority(NVIC_DMA2_STREAM0_IRQ, 1);

//     nvic_enable_irq(NVIC_DMA2_STREAM0_IRQ);

//     // dma_enable_stream(DMA2, DMA_STREAM0);

// }



void timer_setup()

{
@@ -430,15 +417,18 @@ void adc_setup() 
    adc_off(ADC3);



    ADC_CCR = 0;

    adc_set_clk_prescale(0);

    ADC1_CR1 = 0;

    ADC1_CR2 = 0;

    // adc_set_clk_prescale(0);

    adc_set_single_conversion_mode(ADC1);

    adc_set_single_conversion_mode(ADC2);

	adc_set_single_conversion_mode(ADC3);

    // adc_set_single_conversion_mode(ADC2);

	// adc_set_single_conversion_mode(ADC3);

    adc_enable_scan_mode(ADC1);



    // Input 1

    uint8_t channels1[] = {2, 12};   // Voltage, PA2, ADC123

    uint8_t channels1[] = {2, 12};   // CH2 Voltage, PA2, ADC123

    // uint8_t channels1[] = {ADC_CHANNEL2, ADC_CHANNEL12};   // Voltage, PA2, ADC123

    // uint8_t channels2[] = {ADC_CHANNEL12};  // Current, PC2, ADC123

    // uint8_t channels2[] = {ADC_CHANNEL12};  // Ch12 Current, PC2, ADC123

    // Input 2

    // uint8_t channels1[] = {ADC_CHANNEL3};   // Voltage, PA3, ADC123

    // uint8_t channels2[] = {ADC_CHANNEL1};   // Current, PA1, ADC123
@@ -449,14 +439,12 @@ void adc_setup() 
    // uint8_t channels1[] = {ADC_CHANNEL8};   // Voltage, PB0, ADC12

    // uint8_t channels2[] = {ADC_CHANNEL14};  // Current, PC4, ADC12

    adc_set_regular_sequence(ADC1, 2, channels1);

    // adc_enable_discontinuous_mode_regular(ADC1, 1);

    adc_enable_scan_mode(ADC1);

    adc_enable_discontinuous_mode_regular(ADC1, ADC_CR1_DISCNUM_1CHANNELS );

    // adc_set_regular_sequence(ADC2, 1, channels2);



    adc_disable_external_trigger_regular(ADC2);

    // adc_disable_external_trigger_regular(ADC2);



    adc_set_sample_time(ADC1, ADC_CHANNEL2, ADC_SMPR_SMP_15CYC);

    adc_set_sample_time(ADC1, ADC_CHANNEL12, ADC_SMPR_SMP_15CYC);

    adc_set_sample_time_on_all_channels(ADC1, ADC_SMPR_SMP_15CYC);

    adc_enable_external_trigger_regular(ADC1,ADC_CR2_EXTSEL_TIM2_TRGO, ADC_CR2_EXTEN_RISING_EDGE);



    adc_set_resolution(ADC1, ADC_CR1_RES_12BIT);
@@ -466,7 +454,7 @@ void adc_setup() 
    // adc_enable_dma(ADC1);

    // adc_enable_dma(ADC2);

    // adc_enable_dma(ADC3);

    adc_set_dma_continue(ADC1);

    // adc_set_dma_continue(ADC1);

    // adc_set_dma_continue(ADC2);

    // adc_set_dma_continue(ADC3);
@@ -479,10 +467,20 @@ void adc_setup() 
    adc_enable_eoc_interrupt(ADC1);

    adc_eoc_after_each(ADC1);





    ADC1_CR1 = 0x04000920;

    ADC1_CR2 = 0x16000400;

    ADC1_SMPR1 = 0x01249249;

    ADC1_SMPR2 = 0x09249249;

    ADC1_SQR1  = 0x00100000;

    ADC1_SQR2  = 0x00000000;

    ADC1_SQR3  = 0x00000182;



    adc_power_on(ADC1);

    // adc_power_on(ADC2);

    // adc_power_on(ADC3);



    nvic_set_priority(NVIC_ADC_IRQ, 0xF);

    nvic_enable_irq(NVIC_ADC_IRQ);

}
@@ -520,16 +518,26 @@ uint8_t control_buffer[128] __attribute__((aligned (16))); 


short *buffer_to_process=NULL;



void process_buffer(unsigned short *cur_buf)

void error_condition()

{

    gpio_set(GPIOD, GPIO15);

    while(1);

}



void process_buffer(power_data *pd)

{

    int i;

    unsigned pp_tot = 0, pv_tot = 0, pi_tot=0;



    for(i = 0; i < DMA_SHORTS; i+=2)

    // Subtract 1 incase we have an unpaired sample at the end

    unsigned short n_samples = pd->idx - 1;



    for(i = 0; i < n_samples; i+=2)

    {

        unsigned short c = cur_buf[i+1];

        unsigned short v = cur_buf[i];

        unsigned short c = pd->data[i+1];

        unsigned short v = pd->data[i];

        unsigned short p = c*v;



        a_data.energy_accum += p;

        pp_tot += p;

        pi_tot += c;
@@ -537,19 +545,11 @@ void process_buffer(unsigned short *cur_buf) 


        a_data.n_samples += 1;

        a_data.elapsed_time += tperiod;



        // if(cur_buf[i] < 2000 || cur_buf[i] > 2100)

        // {

        //     // dma_disable_stream(DMA2, DMA_STREAM0);

        //     // while(1);

        // gpio_toggle(GPIOD, GPIO15);

        // }

        // gpio_toggle(GPIOD, GPIO14);

    }



    pp_tot /= DMA_SHORTS/2;

    pv_tot /= DMA_SHORTS/2;

    pi_tot /= DMA_SHORTS/2;

    pp_tot /= n_samples/2;

    pv_tot /= n_samples/2;

    pi_tot /= n_samples/2;



    if(pp_tot > a_data.peak_power)

        a_data.peak_power = pp_tot;
@@ -560,6 +560,8 @@ void process_buffer(unsigned short *cur_buf) 


}



int cnt=0;



int main(void)

{

    int c_started=0, n, cpy;
@@ -579,7 +581,7 @@ int main(void) 
    gpio_mode_setup(GPIOD, GPIO_MODE_OUTPUT, GPIO_PUPD_NONE, GPIO15 | GPIO14 | GPIO13 | GPIO12);

    gpio_set_af(GPIOA, GPIO_AF10, GPIO9 | GPIO11 | GPIO12);



    dma_setup();

    // dma_setup();

    adc_setup();

    timer_setup();

    exti_timer_setup();
@@ -592,7 +594,6 @@ int main(void) 


    while (1)

    {



        usbd_poll(usbd_dev);



        if(send_int)
@@ -601,48 +602,51 @@ int main(void) 
            send_int = 0;

        }



        if(buffer_to_process != NULL)

        if(head_ptr != tail_ptr)

        {

            process_buffer(buffer_to_process);

            buffer_to_process = NULL;

            process_buffer(&data_bufs[head_ptr]);



            head_ptr++;

            if(head_ptr >= NUM_BUFFERS)

                head_ptr = 0;

        }

    }

}





int lastErr = 0;

// int lastErr = 0;



void dma2_stream0_isr()

{

    int nhead,i;

// void dma2_stream0_isr()

// {

//     int nhead,i;



    // if((DMA2_LISR & DMA_LISR_TCIF0) != 0)

    {

        unsigned voltage, b0, b1;

        short c, dptr;

//     // if((DMA2_LISR & DMA_LISR_TCIF0) != 0)

//     {

//         unsigned voltage, b0, b1;

//         short c, dptr;



        unsigned short * cur_buf;

//         unsigned short * cur_buf;



        // dma_clear_interrupt_flags(DMA2, DMA_STREAM0, DMA_LISR_TCIF0);

//         // dma_clear_interrupt_flags(DMA2, DMA_STREAM0, DMA_LISR_TCIF0);



        // if(adc_get_overrun_flag(ADC1))

        //     while(1);

//         // if(adc_get_overrun_flag(ADC1))

//         //     while(1);



        // if(dma_get_target(DMA2, DMA_STREAM0) == 0)

        //     cur_buf = dbuf1;

        // else

            cur_buf = dbuf0;

//         // if(dma_get_target(DMA2, DMA_STREAM0) == 0)

//         //     cur_buf = dbuf1;

//         // else

//             cur_buf = dbuf0;



        if(buffer_to_process == NULL)

        {

            buffer_to_process = cur_buf;

        }

    }

    // else

    // {/

    //     while(1);

//         if(buffer_to_process == NULL)

//         {

//             buffer_to_process = cur_buf;

//         }

//     }

//     // else

//     // {/

//     //     while(1);

//     // }

// }

}



int status = -1;
@@ -697,37 +701,47 @@ void exit(int a) 


// TODO, calculations here instead of dma

int nbuff = 0;

unsigned last = 0;

unsigned inisr = 0, last_cnt=0;

void adc_isr()

{

    if(adc_get_overrun_flag(ADC1))

    {

        error_condition();

    }

    if(adc_eoc(ADC1))

    {

        dbuf0[nbuff++] = ADC1_DR;

        power_data *pd = &data_bufs[tail_ptr];

        unsigned a,b,c,d;



        if(abs(dbuf0[nbuff-1] - last) < 20 && last != 0)

        {

            while(1);

        }

        last = dbuf0[nbuff-1];

        ADC_SR(ADC1) &= ~ADC_SR_EOC;

        a = ADC1_DR;

        // b = adc_read_injected(ADC1,2);

        // c = adc_read_injected(ADC1,3);

        // d = adc_read_injected(ADC1,4);



        // if(nbuff > DMA_SHORTS)while(1);

        pd->data[pd->idx++] = a;

        // pd->data[pd->idx++] = b;



        if(nbuff >= DMA_SHORTS)

        {

            nbuff = 0;

        // pd->data[pd->idx++] = adc_read_injected(ADC1,4);



        // if(pd->idx < 128 && ((pd->idx-1) & 1) == 0 && pd->data[pd->idx-1] < 2000)

        // {

        //     while(1);

        // }



            if(buffer_to_process == NULL)

        if(pd->idx >= DMA_SHORTS)

        {

                buffer_to_process = dbuf0;

            }

            else

                while(1);

            tail_ptr = (tail_ptr + 1);

            if(tail_ptr >= NUM_BUFFERS)

                tail_ptr = 0;



            data_bufs[tail_ptr].idx = 0;



            if(tail_ptr == head_ptr)

                error_condition();

        }

        adc_enable_eoc_interrupt(ADC1);

        // ADC_SR(ADC1) &= ~ADC_SR_JEOC;

    }

    if(adc_get_overrun_flag(ADC1))

    {

    gpio_toggle(GPIOD, GPIO15);

        while(1);

    }



}